Using makefiles

make

Run the "make" utility to build (compile, link, etc) a project described in the Makefile found in the current directory.

make is used to bring a system "up to date", whenever a change in one file requires an action elsewhere. make is "intelligent" in that it will not make changes unless the change is required, as determined by the file modification date/time. Normally used for buiding software packages (compiling, linking ...), make is also used for other tasks, e.g., system administration. Makefile looks as follows:

target : prerequisites

[Tab]commands

where target is usually a file (but does not have to be, it can be a "phony" target), and prerequisites are files on which target depends. If target does not exist or is older than any prerequisites, "commands" are executed. The first line above is called "the rule", the second "the action". Please note that any action line must start with the tab character. Here is an example Makefile that makes an executable file called "edit":

my_program : main.o command.o

cc -o my_program main.o command.o

main.o : main.c defs.h

cc -c main.c

command.o : command.c defs.h command.h

cc -c command.c

clean :

rm my_program main.o command.o

To use this Makefile to create an executable file called "my_program', I type: make. It works backwards to determine the dependencies, so first it compiles "command.c" to the object file "command.o", then it compiles "main.c" to "main.o", and finally it links "main.o" and "command.o" into the executable "my_program".

One could also use this makefile to delete the executable file and all the object files from the directory by typing: make clean. Since the target "clean" does not depend on any prerequisites, it is not normally executed unless explicitly called. The target "clean" is an example of a "phony" target.